Advanced Techniques for Enhancing Low-Noise Amplifier Performance: A Review

Section: Review Paper
Issue
Vol. 29 No. 1 (2024): Volume 29 Issue 1
Published
Mar 1, 2024
Pages
35-45

Abstract

This paper reviews prior investigations into low noise amplifier (LNA) design. In this work, various modern LNA architectures will be examined, with a focus on five technologies: Cascode Distributed LNA, Coupled-Line Feedback in 0.15-m GaAs pHEMT Technology, Dual-Band CMOS LNA in 65-nm CMOS, CMOS LNA Using Post-distortion technique and 22-nm FD-SOI CMOS. In this review, Low power dissipation rate, input and output synchronization, high gain, and low noise levels are examined. In order to design a new successful LNA, each topology's performance is then examined. Future research will be conducted based on comparisons of these five topologies.

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Authors

Mohammed T. Yassin

Electrical Engineering Department, Collage of Engineering, University of Mosul, Mosul, Iraq

ORCID
Serri Saleh

Department of Electrical Engineering, College of Engineering, University of Mosul, Mosul, Iraq

ORCID
Khalid K. Mohammed

Department of Electrical Engineering, College of Engineering, University of Mosul, Mosul, Nineveh, 41002, Iraq

ORCID
Hashim H. H. Hausien

-

ORCID

Identifiers

https://doi.org/10.33899/rengj.2023.144224.1295
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How to Cite

[1]
M. T. Yassin, S. Saleh, K. K. Mohammed, and H. H. H. Hausien, “Advanced Techniques for Enhancing Low-Noise Amplifier Performance: A Review”, AREJ, vol. 29, no. 1, pp. 35–45, Mar. 2024.
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