Design and simulation of Differential Transimpedance Amplifier (TIA) Based on 0.18 µm CMOS Technology-eng

Section: Article
Published
Aug 28, 2013
Pages
121-131

Abstract

AbstractThe transimpedance amplifier is realized in a 0.18m CMOS technology. The TIA uses a shunt-shunt feedback topology, differential TIA because it reaches a higher bandwidth than a conventional one. The TIA also has a variable gain to increase the bandwidth of theamplifier . The TIA has a maximum gain of 73 dB, bandwidth 3.1GHZ, bit rate 5Gb/s and input-referred current noise of 5 pA/Hz. Eyejitter at bit rate 5Gb/s equal to 5ps (peak to peak).Keywords:transimpedance amplifier (TIA) , Berkeley Short Channel Igfet model (BSIM model) , Advanced design system (ADS) .

Download this PDF file

Statistics

How to Cite

[1]
D. Luqman Safar and M. Samir Zaki, “Design and simulation of Differential Transimpedance Amplifier (TIA) Based on 0.18 µm CMOS Technology-eng”, AREJ, vol. 21, no. 4, pp. 121–131, Aug. 2013.